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For loop
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121	Volume 12, Number 1 DOI: jiaeeA New Implication for China’s Rural Education Reform: Organizational Learning Theory Difei Shen Add to Reading List Source URL: www.aiaee.org Language: English - Date: 2014-05-26 00:22:36 Educational psychology Education Chris Argyris Organizational learning Education in China Learning theory Music education Education reform Double-loop learning Educational technology Donald Schn
122	TACO0903-20 ACM-TRANSACTION September 14, 2012 Add to Reading List Source URL: www.des.udc.es Language: English - Date: 2014-06-30 07:11:02 Compiler optimizations Cache Computer memory Computer architecture CPU cache Central processing unit For loop Infinite loop
123	Optical Imaging of Paramagnetic Bead-DNA Aggregation Inhibition Allows for Low Copy Number Detection of Infectious Pathogens Add to Reading List Source URL: shukla.io Language: English - Date: 2015-07-02 02:43:32 Molecular biology Laboratory techniques Polymerase chain reaction Biotechnology DNA replication Loop-mediated isothermal amplification Real-time polymerase chain reaction Primer Reverse transcription polymerase chain reaction Chromatin immunoprecipitation Amplicon
124	DA L L A S D I S T R I C T DALLAS DISTRICT KEY PROJECTS (PLANNING) “Work with others to provide safe and reliable transportation solutions for Texas.” 0273_040814 Add to Reading List Source URL: www.keepitmovingdallas.com Language: English - Date: 2015-07-27 18:28:27 Interstate Highway System Interstate 35 Interstate 35E Interstate 35W Texas State Highway 121 Stemmons Corridor Dallas Frontage road Interstate 35 in Texas President George Bush Turnpike Interstate 45 Interstate 30 Texas State Highway Loop 12
125	A BGP-based Mechanism for Lowest-Cost Routing∗ † Joan Feigenbaum ‡ Add to Reading List Source URL: cs-www.cs.yale.edu Language: English - Date: 2002-08-12 09:52:11 Routing protocols Routing algorithms Routing Edsger W. Dijkstra Border Gateway Protocol Strategyproofness Shortest path problem Routing loop problem Link-state routing protocol
126	PRESS RELEASE For immediate release The FTTH Council Europe welcomes new Director General Erzsébet Fitori Brussels, 30 JuneThe FTTH Council Europe is pleased to announce that the organisation appointed Add to Reading List Source URL: www.symposium.ftthcouncil.eu Language: English - Date: 2016-06-30 10:07:54 Network architecture Local loop Broadband Fiber-optic communications Fiber to the x Telephony European Competitive Telecommunications Association Fiber to the premises by country
127	The Need for Humans in the Loop: Meeting the Grand Challenge of Full Functional Verification Matt Kaufmann & J Strother Moore Department of Computer Science University of Texas at Austin Austin, TX 78701 Add to Reading List Source URL: fm.csl.sri.com Language: English - Date: 2010-10-22 17:23:36 Formal methods Technical communication Automated theorem proving Theoretical computer science Logic in computer science Formal verification ACL2 Functional verification User interface Proof assistant Usability Verification and validation
128 $Cardiovascular physiology / End-diastolic volume / Stroke volume / Preload / Cardiac output / Diastole / Ejection fraction / Blood pressure / Systole / Pressure-volume loop analysis in cardiology$	Parameters provided for Ventricular Hemodynamics (Pressure-Volume loops) Parameter Unit Add to Reading List Source URL: media.rrc.uic.edu Language: English - Date: 2013-05-31 10:47:35 Cardiovascular physiology End-diastolic volume Stroke volume Preload Cardiac output Diastole Ejection fraction Blood pressure Systole Pressure-volume loop analysis in cardiology
129	Processing ASTs in C++: maketea Edsko de Vries⋆ , John Gilbert, and David M Abrahamson Trinity College Dublin Abstract. We present maketea, a tool which generates a C++ infrastructure for processing ASTs based on an ob Add to Reading List Source URL: www.edsko.net Language: English - Date: 2016-08-02 06:27:04 C++ Software design patterns Visitor pattern Functional programming Functional Node C++ classes Pattern matching Reference Foreach loop Tree traversal
130	Auto-tuning the 27-point Stencil for Multicore Kaushik Datta2 , Samuel Williams1 , Vasily Volkov2 , Jonathan Carter1 , Leonid Oliker1 , John Shalf1 , and Katherine Yelick1 1 CRD/NERSC, Lawrence Berkeley National Laborat Add to Reading List Source URL: crd.lbl.gov Language: English - Date: 2012-09-06 23:44:43 Compiler optimizations Loop nest optimization Stencil code Roofline model Program optimization Stencil CPU cache Common subexpression elimination Scalable locality

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